Reproducing Automated Heterogeneous Memory Data Distribution Literature Results and Beyond
Project reference: 1902
Supercomputers are a key tool for professionals from many disciplines to address society challenges, enabling them to perform, e. g., climate change simulations or genome analysis. European Commission’s high-performance computing (HPC) Strategy, implemented in the Horizon 2020 Programme, devises the need to bring Europe’s high-performance computing technology to the exascale era, being energy efficiency one of the major challenges. Since providing the required amount of memory for upcoming exascale applications is not viable by means of top performance technology only, due to energy consumption and dissipation constraints, vendors are incorporating a variety of additional memory subsystems built upon different technologies, which provide diverse features and limitations (e.g., Intel’s 3D XPoint technology). Deciding what data to host in each memory subsystem is far from trivial and poses notable performance and energy implications. Recent research has proposed different methodologies to address this problem, e. g., based on object or page level placement, based on system emulation or sampling of real hardware counters, based on profiling or run time, etc. The aim of this project is to reproduce some of the results of previous works and improve upon the state of the art of this field, based on already developed technology at the hosting institution. The selected student will have access to state of the art hardware and will be mentored by experts in the field, in close collaboration with the Intel-BSC Exascale Laboratory. A co-authored journal paper is expected to be submitted based on the knowledge developed during the internship.
Project Mentor: Antonio J. Peña
Project Co-mentor: Muhammad Owais
Site Co-ordinator: Maria Ribera Sancho
Participant: Perry Gibson
- Heterogeneous memory data placement strategies.
- Latest trends in heterogeneous memory systems for HPC.
Student Prerequisites (compulsory):
- Computer Architecture
Student Prerequisites (desirable):
- Week 1: Training
- Week 2: Literature review and plan report development
- Week 3-7: Project development
- Week 8: Development of final report
Final Product Description:
- Reproduced previous paper results.
- A scientific paper and/or technical report.
Adapting the Project: Increasing the Difficulty:
We can add improving upon the state-of-the-art to the reproducibility work.
Adapting the Project: Decreasing the Difficulty:
We can keep the project within the reproducibility part. The student will be technically assisted with actual coding workforce if needed.
A laptop brought by the student. We will provide access to the required hardware.
Barcelona Supercomputing Centre